VLSI Design & Embedded Systems
Final year Electronics & Communication Engineering student at IEM Kolkata with a strong foundation in digital electronics, Verilog HDL, and analog IC design. Published researcher with hands-on industry experience at IEDC and Jadavpur University.
I am a final year B.Tech student in Electronics and Communication Engineering at Institute of Engineering and Management, Kolkata, with a CGPA of 9.1/10. My academic journey has been driven by a deep passion for the semiconductor domain — from transistor-level analog circuit design to digital hardware description.
My internships at IEM's IEDC and Jadavpur University gave me practical experience in Verilog HDL, Cadence tools, and VLSI fabrication processes. My final year project — an Ahuja-Compensated Three-Stage Folded-Cascode V-I Converter — achieved 82 dB DC gain at 90nm CMOS, published in IEEE IEMENTech 2026.
Beyond engineering, I authored a book on the mathematical constant π, create large-scale wall paintings, and maintain a portfolio of pencil art — believing that creativity fuels problem-solving in all domains.
| Year | Degree / Exam | Institution | Score |
|---|---|---|---|
| 2022 – 2026 | B.Tech — Electronics & Communication Engineering | Institute of Engineering and Management, Kolkata | 9.1 / 10 |
| 2022 | Higher Secondary (Class XII) | Ramakrishna Mission Vidyabhavan, Midnapore | 97.33% |
| 2020 | Secondary (Class X) | Ramakrishna Mission Vidyabhavan, Midnapore | 93.7% |
I am actively seeking entry-level roles in VLSI design, analog IC design, or embedded systems. If you are working on exciting problems in the semiconductor domain, I would love to hear from you.
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